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Vineet Jaiswal

Vineet Jaiswal

Assistant Professor

  • Qualification

    B.Tech. GBPUA&T Pantnagar, M.Tech. MNNIT Allahabad, PhD from NIT Kurukshetra
  • Specialisation

    VLSI Design and Embedded Systems
  • Research Interest

    Quantum Architecture, Nanomagnetic Logic Circuits, Hardware Modelling using Verilog, P&R Algorithms, Machine Learning
 Vineet Jaiswal
  • Brief Profile

    Vineet Jaiswal joined the Department of Electrical and Electronics & Communication Engineering as an Assistant Professor in April 2025. He submitted his PhD Thesis to the School of VLSI Design and Embedded Systems, NIT Kurukshetra and holds an M.Tech. in Microelectronics and VLSI Design from MNNIT Allahabad. His area of research interests centres upon Quantum Architecture, Nanomagnetic Logic Circuits, Hardware Modelling using Verilog, P&R Algorithms, and Machine Learning. He was the Full-time MHRD-sponsored M.Tech. and PhD scholar at MNNIT Allahabad and NIT Kurukshetra, respectively. He has vast experience of 10+ years of teaching and research and published several papers in national/international conferences and peer-reviewed journals. He also contributed as a reviewer and session chair for reputed journals and conferences. He has attended more than 25 FDPs, workshops, STTPs, and seminars during his teaching and research tenure.